ADS Workshop on PCI Express

http://www.cadfamily.com/downinfo/300871.html

Stackup and Trace Topologies
• Four layer stackup (0.062 in PCB) with 0.5 Oz copper for microstrip
• 1 Oz copper for 6+ layer strip line structure
• Trace length matching between pairs not required due to embedded clock and lane de-skew in the receiver C Makes routing easier and longer trace traces feasible (max lane to lane skew is 1.6 ns)
• Max. recommended trace length on system board < 12 in
• Max. recommended trace length on add in card < 3.5 in
• Maximum skew tolerable within differential pair is 5 mil for add in card, 10 mil for system board