MAX 3000A devices contain 32 to 512 macrocells, combined into groups
of 16 macrocells called logic array blocks (LABs). Each macrocell has a
programmable–AND/fixed–OR array and a configurable register with
independently programmable clock, clock enable, clear, and preset
functions. To build complex logic functions, each macrocell can be
supplemented with shareable expander and high–speed parallel
expander product terms to provide up to 32 product terms per macrocell.
MAX 3000A devices provide programmable speed/power optimization.
Speed–critical portions of a design can run at high speed/full power,
while the remaining portions run at reduced speed/low power. This
speed/power optimization feature enables the designer to configure one
or more macrocells to operate at 50% or lower power while adding only a
nominal timing delay. MAX 3000A devices also provide an option that
reduces the slew rate of the output buffers, minimizing noise transients
when non–speed–critical signals are switching. The output drivers of all
MAX 3000A devices can be set for 2.5 V or 3.3 V, and all input pins are
2.5–V, 3.3–V, and 5.0-V tolerant, allowing MAX 3000A devices to be used
in mixed–voltage systems.
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