12/16/2010

ESD protection structure with embedded high-voltage p-type SCR

http://www.cadfamily.com/downinfo/302984.html

The high-voltage output cell of the automotive VFD driver IC fabricated in a 0.5-µm high-voltage CMOS process is shown in Fig. 1.In this VFD driver IC, the output pull-up function is realized by the high-voltage PMOS (HVPMOS),whereas the pull-down function is realized by the on-chip
resistor of 300 kohm for vacuum fluorescent display. The resistor is connected from the output pad to VEE of -40V for VFD applications.
The device structure of the HVPMOS is drawn in Fig. 2,where the high-voltage region is surrounded by the high-voltage (HV) P-well of lightly doped concentration with a specified clearance from the HV P-well edge to the drain P+ diffusion of the HVPMOS. Such a HV P-well with lightly doped concentration will provide the drain of HVPMOS with high enough breakdown voltage for VFD application.The breakdown voltage of the HVPMOS is specified to be higher than 45V for this VFD application.

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