11/30/2010

Codevision Microcontroller with 1K Byte of In-System Programmable Flash AT90S1200

http://www.cadfamily.com/downinfo/302481.html

•Bits 7..4 CRes: Reserved Bits
These bits are reserved bits in the AT90S1200 and will always read as zero.
•Bit 3?CWDE: Watchdog Enable
When the WDE is set (one) the Watchdog Timer is enabled, and if the WDE is cleared
(zero) the Watchdog Timer function is disabled.
•Bits 2..0?CWDP2..0: Watchdog Timer Prescaler 2, 1 and 0
The WDP2..0 determine the Watchdog Timer prescaling when the Watchdog Timer is
enabled. The different prescaling values and their corresponding timeout periods are
shown in Table 6.

Codevision Microcontroller with 2K Bytes of In-System Programmable Flash AT90S2313

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Port D has seven bi-directional I/O ports with internal pull-up resistors, PD6..PD0. The
Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally pulled
low will source current if the pull-up resistors are activated. The Port D pins are tri-stated
when a reset condition becomes active, even if the clock is not active.
Port D also serves the functions of various special features of the AT90S2313 as listed
on page 58.
Reset input. A low level on this pin for more than 50 ns will generate a reset, even if the
clock is not running. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.

Codevision Microcontroller with 8K Bytes In-System Flash AT90S8515

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Memory Access Times and Instruction Execution Timing
This section describes the general access timing concepts for instruction execution and internal memory access.
The AVR CPU is driven by the System Clock Ø, directly generated from the external clock crystal for the chip. No internal clock division is used.
Figure 20 shows the parallel instruction fetches and instruction executions enabled by the Harvard architecture and the fast-access register file concept. This is the basic pipelining concept to obtain up to 1 MIPS per MHz with the corresponding unique results for functions per cost, functions per clocks and functions per power unit.

Codevision AT90S4433 Preliminary

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Serial Peripheral Interface - SPI
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the AT90S2333/4433 and
peripheral devices or between several AVR devices. The AT90S2333/4433 SPI features include the following:
Full-Duplex, 3-Wire Synchronous Data Transfer
Master or Slave Operation
LSB First or MSB First Data Transfer
Four Programmable Bit Rates
End of Transmission Interrupt Flag
Write Collision Flag Protection
Wake-up from Idle Mode

Codevision Microcontroller with 8K Bytes In-System AT90S8535

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The EEPROM is shared between program memory and
data memory, depending on the mode. The portion of
EEPROM dedicated to each function is flexible and varies
according to the application.
Program memory is read-only in normal operation mode.
Both Flash and EEPROM memory locations are directly
addressable. The EEPROM memory locations follow the
Flash memory in the program address space.
Program Memory
The AT90SC microcontroller has separate address spaces
for program memory and data memory. Up to 48K bytes of
Flash program memory are available. Figure 1 shows the
program memory.

Codevision AT90SC Complete datasheet available under NDA

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8-bit RISC Microcontroller CPU: AVR
The AVR uses a Harvard architecture concept with sepa-
rate memories and buses for program and data. The pro-
gram memory is accessed with a two stage pipeline. While
one instruction is being executed, the next instruction is
prefetched from the program memory. This concept
enables instructions to be executed in every clock cycle.
The fast-access register file concept contains 32 x 8 gen-
eral purpose working registers with a single clock cycle
access time. This means that during one single clock cycle,
one ALU operation is executed. Two operands are output
from the register file, the operation is executed, and the
result is stored back in the register file in one clock cycle.
The Timer and other I/O functions are located in the I/O
memory space. The 64 addresses of the I/O memory space
can be accessed directly as I/O registers or as memory
space.

Bitmap Source Module User's Manual

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When rays are emitted from the bitmap, we want them to go toward the optical system. To ensure
that this happens, we must provide a target to the Bitmap Source Module to use for aiming rays.
This is similar to importance sampling in TracePro. Switch back to TracePro to verify that front of the lens is at about z = 8mm and has a radius of about 50mm. Imagine a circular plane target at the front of the lens, with radius equal to 50mm and located z = 8mm. This is the plane from which rays in the source file will be launched. The Bitmap Source Module will trace rays from the bitmap to this target plane, and store the directions and locations of the rays in the source file at this plane.
Therefore it is important that the target plane not be embedded in any geometry. This is in contrast to importance sampling in TracePro, in which importance sampling targets are often embedded in
the model.

BSDF Data Converter Lambda Research Corporation

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In the Profile editor, you can modify the data points by clicking and dragging them, and the resulting BSDF?\beta plot, optimized ABg model, and the 3D intensity preview will be updated in real time.

The forbidden angle defines a range of angles relative to the specular direction.

The data within the range will be ignored

Codevision Microcontroller with 8K Bytes Programmable FlashAT90S8534 Preliminary

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ALU C Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general-purpose working registers. Within a single clock cycle, ALU operations between registers in the register file are executed. The ALU operations are divided into three main categories: arithmetic, logical and bit functions.
Programmable Flash Program Memory
The AT90C8534 contains 8K bytes of on-chip programmable Flash memory for program storage. Since all instructions are 16- or 32-bit words, the Flash is organized as 4K x 16. The Flash memory has an endurance of at least 1000 write/erase cycles. The AT90C8534 program counter (PC) is 12 bits wide, thus addressing the 4096 program memory addresses.
Constant tables must be allocated within the address 0 - 4K (see the LPM ?C Load Program Memory instruction description).See page 9 for the different program memory addressing modes.

TracePro User Manual

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How Does TracePro Implement Solid Modeling
TracePro is based on a specific solid modeling engine called ACIS, made by
Spatial Corporation. Using ACIS, TracePro can conveniently share solid model
data with any other software program that is based on ACIS. TracePro can also
exchange data with most other non-ACIS based CAD and analysis programs via
IGES, STEP and other CAD formats using optional translators. TracePro can also
import lens design files from popular lens design programs.
Any entities that you create in TracePro are referred to collectively as a model.
Contained in this model are the individual pieces of solid geometry that are called
objects. By using a solid modeling approach, TracePro requires that all solid
objects must be bounded by surfaces. Objects can be defined within TracePro, or
they can be defined elsewhere (as in a CAD program) and imported into
TracePro. Objects within the TracePro solid model can be manipulated in a
number of different ways including the action of combining two or more objects
into a single object so that the only surfaces the object now has, are the
bounding or outer surfaces of the object.

11/17/2010

ESA-Prima Win Design of connections in steel frames

http://www.cadfamily.com/downinfo/302321.html

Pinned connections
The frame pinned connections are connections which do not transfer any moment. This is caused by the gap between the beam flange and the column flange.
The following beam-to-column connection types are supported: knee, cross, single T, double T.
The following connection elements are supported:
plate welded to beam web and welded to column flange
plate bolted in beam web and welded to column flange
angle section bolted in beam web and bolted in column flange
short endplate: welded to beam web and bolted in column flange

ESA-Prima Win Truss connections

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The module Truss connections integrates the calculation of connections in truss structures in ESA-Prima Win. Welded connections in plane as well as spatial trusses consisting of rectangular and circular hollow sections, I and C sections are checked according to the latest regulations.
As the structural model and the internal forces are defined already, only limited additional input is required. The program is built up as a wizard, which will guide you through the different steps of the input and the calculation process. Most operations, e.g. the recognition of standard joints, are fully automatic.
This wizard approach and the integration of the connection calculation in ESA-Prima Win makes the design much easier and more efficient.

ESA-Prima Win Expert System Connect Frame

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The expert system is used for all types of steel frame connections which are implemented in ESA-Prima Win: bolted, welded and pinned connections.
When a node is selected, the expert system searches the template library for matching connections.A list of matching connections and their unity check (actual internal force divided by allowable internal force) is given. The program considers several criteria to select matching connections: joint
type, geometry, cross sections, steel qualities, ... The list displays the name of the connection, the unity check, the bolt grade, the source from which the connection comes, ... The selected connection is drawn on the screen.
For welded and bolted beam-column and beam-beam connections, the unity check is based on the
moment capacity. For bolted base plate connections, the unity check is based on the moment
capacity and the normal force capacity. For pinned connections, the unity check is based on the
shear force capacity.
For each connection in the template library a priority (1 to 5) can be defined. This priority represents the user preferences: some companies will prefer connections with always the same bolt diameter,other companies will prefer a minimum number of bolts, ...

ESA-Prima Win Automatisch selecteren van economische

http://www.cadfamily.com/downinfo/302326.html
Wanneer de juiste verbinding geselecteerd is, keert het programma terug naar het Connect Frame programma voor de berekening van de verbinding. Wanneer de toleranties in het zoekproces hoog zijn (bijvoorbeeld de tolerantie op de hoek tussen de kolom en de ligger), kan er een verschil zijn tussen de capaciteit die in de verbindingsbibliotheek werd opgeslagen en de actuele capaciteit in deze knoop.
De verbindingsbibliotheek
De verbindingsbibliotheek bevat een groot aantal vooraf gedefinieerde verbindingen en
verbindingen die door de gebruiker opgeslagen werden. Behalve de geometrische gegevens wordt ook de capaciteit van de verbinding (grensmoment, grensnormaalkracht, ...) en de stijfheid in deze bibliotheek opgeslagen. De capaciteit en de stijfheid zijn gebaseerd op de grenstoestand van de verbinding.

ESA-Prima Win Overview drawings for steel structures

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ESA-Prima Win projects can be exported to CAD programs by different interface files
(Produktschnittstelle Stahlbau, a STEP based format or DSTV). This possibility is included in the standard program. When building parts have been defined in the Project module, these building parts will be exported instead of the members of the calculation model.
The building parts are defined easily with one of the available functions: taking together continuous members with the same cross-section, defining nodes with continuous beam or column, ...

SIMATIC Ladder Logic for S7-300 and S7-400

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Description
DIV_R (Divide Real) is activated by a logic "1" at the Enable (EN) Input. IN1 is divided by IN2 and the result can be scanned at OUT. If the result is outside the permissible range for a floating-point number (overflow or underflow), the OV bit and OS bit is "1" and ENO is logic "0", so that other functions after this math box which are connected by the ENO (cascade arrangement) are not executed. See also Evaluating the Bits of the Status Word.

SIMATIC S7-SCL for S7-300 and S7-400 manual

http://www.cadfamily.com/downinfo/302343.html

The simple expression stands for the maximum number of characters in the
STRING. All the characters of the ASCII code are permitted in a character string. A
string can also include special characters, for example, control characters and
nonprintable characters. You can enter these using the syntax $hh, where hh
stands for the value of the ASCII character expressed in hexadecimal (example:
'$0D$0AText' )
When you declare the memory space for character strings, you can define the
maximum number of characters that can be stored in the string. If you do not
specify a maximum length, a string with a length of 254 is created.

SIMATIC Statement List for S7-300 and S7-400

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+I(add 16-bit integer numbers) adds the contents of ACCU 1-L to the contents of ACCU 2-L and stores the result in ACCU 1-L. The contents of ACCU 1-L and ACCU 2-L are interpreted as 16-bit integer numbers. The instruction is executed without regard to, and without affecting, the RLO. The status word bits CC 1, CC 0, OS, and OV are set as a function of the result of the instruction. The instruction produces a 16-bit integer number instead of an 32-bit integer number in the event of an overflow/underflow.
The contents of accumulator 2 remain unchanged for CPUs with two ACCUs.
The contents of accumulator 3 are copied into accumulator 2, and the contents of accumulator 4 are copied into accumulator 3 for CPUs with four ACCUs. The contents of accumulator 4 remain
unchanged.

SIMATIC PID Temperature Control Manual

http://www.cadfamily.com/downinfo/302346.html

Control Zone (CONZ_ON, CON_ZONE)
If CONZ_ON = TRUE, the controller operates with a control zone. This means that
the controller operates according to the following algorithm:
• If PV exceeds SP_INT by more than CON_ZONE, the value LMN_LLM is
output as the manipulated variable (controlled closed-loop).
• If PV falls below SP_INT by more than CON_ZONE, the value LMN_HLM is
output as the manipulated variable (controlled closed-loop).
• If PV is within the control zone (CON_ZONE), the manipulated variable takes
its value from the PID algorithm LMN_Sum (automatic closed-loop control).

Note
The changeover from controlled closed-loop to automatic closed-loop control
takes into account a hysteresis of 20% of the control zone.

SIMATIC System and Standard Functions for S7-300 and S7-400

http://www.cadfamily.com/downinfo/302347.html

AINFO parameters
AINFO is the source area for additional interrupt information. As far as the intelligent slave is concerned, you can fill this area with any values that you wish. However, if you are using a DP master of the S7 family, the additional information sent along with the interrupt must conform to S7 conventions.
If you send a diagnostic interrupt (ATYPE=1), then you are responsible for entering appropriate, relevant values in data record 0, and if necessary, also in data record 1.
The following table shows you a proposed set of S7-compatible entries. In this case, the "module fault" bit (see above) was already set. Up to actually naming the bit, this suggestion corresponds to the default assignment (the one existing after a POWER UP, after a STOP-RUN transition at the intelligent slave or a station return).

11/12/2010

VERICUT Create a Tool Library for Milling Cutters

http://www.cadfamily.com/downinfo/302204.html
In this session we will learn how to build different types of milling cutters and drills
using the Tool Manager.

1. Open project file
template_create_tool_library_mill.VcProject
• Launch VERICUT
• File > Open
• Shortcut = Training
• File = template_create_tool_library_mill.VcProject
2. Load a sweep file model for the initial stock
• In the Project tree, select Stock (0, 0, 0)
• In the Configure Component : Stock , Add Model > Model File
• Shortcut = Training
• File name = create_tool_library_mill_stock.swp
• Open

VERICUT Create Turning Tools Metric

http://www.cadfamily.com/downinfo/302205.html
In this session we will learn how to build different types of turning cutters using the Tool
Manager.
1. Open project file
template_create_tool_library_turn_mm.VcProject
• Launch VERICUT
• File > Open
• Shortcut = Training
• File = template_create_tool_library_turn_mm.VcProject

2. Load a VERICUT Polygon model file for the fixture
• In the Project tree, select Fixture (0, 0, 0)
• In the Configure Component : Fixture , Add Model > Model File
• Shortcut = Training
• File name = create_tool_library_turn_fixture.ply
• Open

VERICUT Day 2 Review Session

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In this exercise, we will apply what we have seen today. The steps are not listed. Refer to
the previous training sessions for step-by-step instructions.
All files are located in: Shortcut = Training
1. Open project file template_day1_review.vcproject
1. Launch VERICUT
2. File > Open
3. Shortcut = Training
4. File = template_day2_review.VcProject
5. Open
2. Load stock, fixture and Design
6. Add fixture models : day2_review_setup1_vise_body.stl and
day2_review_setup1_vise_jaw.stl
7. Move vise jaw as shown:

VERICUT Define NC program Origin

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In this session we will learn how to define the origin of a NC program. In the first part,
we will acquire some skills using assembly constraints to move and locate blocks.

1. Open project file assemble.vcproject
• Launch VERICUT
• File > Open
• Shortcut = Training
• File = assemble.VcProject

2. Move and locate the green block on the blue block
• In the simulation view, select the green block with numbers
This highlights the STL model under the Green Block (0, 0, 0)

VERICUT Configure an NC Control

http://www.cadfamily.com/downinfo/302209.html

This session demonstrates how to customize an NC Control file to simulate how various
G-Code words and data formats that will be processed by an NC machining center. The
sample "modify_control.mcd" tool path file contains many conditions that are commonly
addressed via control customization, for example:
Differing word formats
Unaccounted for special characters that performs NC control functions
Variances in actions performed by specific G-Code word/values
Addressing unsupported G-Code word/values
The step at the end of the session shows how to save the control configuration in a
Control file. A project file containing a reference to the Control file is also saved enabling
VERICUT to be easily configured to interpret the G-Codes in this and similar tool path
files destined for the machining center. The default system configuration is for a 3-axis
mill, but also contains a variety of possibly unwanted job-related data. To begin control
configuration for use in VERICUT it is recommended to load a generic Project file so
that configuration begins from a known state, and without extraneous job data.

SIMATIC Manuel de configuration Application generale partie A

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Les indications necessaires o la configuration du CP PROFIBUS comme esclave DP sont :
la longueur des donnees d??entree
la longueur des donnees de sortie
La configuration de leesclave DP s??effectue o l??aide deappels FC au niveau de l??interface du programme utilisateur de la CPU. Leesclave DP verifie que la longueur specifiee dans le
telegramme de configuration du maitre DP est bien identique o celle specifiee dans les blocs
FC. En cas de difference entre les indications de longueur des donnees deentree/sortie, il ney pas passage en phase de transfert de donnees.

SIMATIC NET Fonctions (FC) et blocs fonctionnels

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Le bloc FC DP_SEND transmet des donnees au CP PROFIBUS. Selon le mode de
fonctionnement du CP PROFIBUS, DP_SEND a la signification suivante.
Quand il est utilise dans le maitre DP
Le bloc transfere au CP PROFIBUS les donnees d'une zone de sortie DP specifiee pour
qu'elles soient remises o la peripherie decentralisee.
Quand il est utilise dans l'esclave DP
Le bloc transfere les donnees d'entree de l'esclave DP au CP PROFIBUS pour qu'elles
soient transmises au maitre DP.

VMEbus Fast Data Channel Specification VXI-10

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In a Normal channel the abort receiver sets the ABT, RDY, WDY and END bits to 0 (zero) and returns the channel to the Idle state. It discards any data which was received during the aborted transfer. The abort generator returns the channel to the Idle state when the ABT bit is returned to 0 by the abort receiver.
In a Stream channel the abort receiver sets the ABT bit to 0 but does not change the state of the channel;the channel remains in the Active state. It discards any data which was received during the aborted block transfer.
When the abort receiver is the servant and the channel was established with a Transfer To Servant command, the error receiver must pass the FDC area to the commander. If the abort receiver is the commander and the channel was established with a Transfer To Commander command, the error receiver must pass the FDC area to the servant. If the stream channel utilizes a channel pair then both FDC areasshould be returned as defined above.

VMEbus TCP/IP-VXIbus Interface Specification VXI-11.1

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The routing of messages from the LAN to the appropriate VXIbus device takes place via the create_link RPC. This RPC is used to create a network instrument link. The created link is associated with a particular VXIbus device via the device parameter. This parameter is a character string which is parsed by the TCP/IP-VXIbus interface device to determine which VXIbus device the link is associated with.
RULE B.1.1:
A TCP/IP-VXIbus Interface Device SHALL support a device string of the following format:
[,]where:
- A name corresponding to the address of a single VXIbus interface. This name
SHALL uniquely identify the interface on the TCP/IP-VXIbus interface device.
- The logical address of a VXIbus device on the VXIbus interface. (optional)

VMEbus TCP/IP-IEEE 488.1 Interface Specification VXI-11.2

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RULE B.4.7:
When a TCP/IP-IEEE 488.1 Interface Device receives a device_trigger RPC and the link identifier is associated with a device, it SHALL execute the TRIGGER control sequence for selected devices described in IEEE 488.2, 16.2.19.1, where the supplied address is the one associated with the link.
RULE B.4.8:
When a TCP/IP-IEEE 488.1 Interface Device receives a device_trigger RPC and the link identifier is associated with an interface, it SHALL execute the TRIGGER control sequence for all addressed devices described in IEEE 488.2, 16.2.19.2.
B.4.5.Remote/Local Operation
RULE B.4.9:
When a TCP/IP-IEEE 488.1 Interface Device receives a device_remote RPC and the link identifier is associated with a device, it SHALL execute the SET RWLS control sequence described in IEEE 488.2,16.2.12, where the supplied listen address is the one associated with the link.

VMEbus TCP/IP Instrument Protocol Specification VXI-11

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B.2. CONNECTION MODEL
This section defines the connection model of the network instrument protocol, as well as the relationship between controllers, devices, network instrument clients, and network instrument servers. The term controller, as used in this specification, typically refers to the RPC client, while the term device typically refers to the RPC server. The only exception is when the roles are reversed for interrupts, which will be described further later in the specification.
As discussed in the overview at the beginning of this specification and shown in Figure B.1, the network instrument protocol uses up to three channels between the controller and the device for passing network instrument messages. A network instrument connection is this set of channels:
Core Channel: Used to transfer all requests except the device_abort RPC and the device_intr_srq RPC.
Abort Channel: Used to transfer the device_abort RPC (optional for client).
Interrupt Channel: Used to transfer the device_intr_srq RPC from the device to the controller(optional for client).

PXI Modular Instrumentation Architecture

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The PXI specification, now at revision 2.0, leverages the CompactPCI specification,
which defines a rugged form factor for PCI that offers superior mechanical integrity and
easy installation and removal of hardware components. PXI products offer higher and
more carefully defined levels of environmental performance required by the vibration,
shock, temperature, and humidity extremes of industrial environments. PXI adds
mandatory environmental testing, EMC testing, and active cooling to the CompactPCI
mechanical specification to ease system integration and ensure multi-vendor
interoperability.

SIMATIC NCM S7 pour PROFIBUS/FMS Manuel Tome 2/2

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Stations du systeme maitre FMS
Les stations connectees au PROFIBUS se subdivisent en stations maitres et stations
esclaves. Le droit deacces au bus, c. CeCd. le jeton, ne circule queentre les stations maitres.
Les esclaves ne peuvent reagir queo une requete du maitre.
Concernant les fonctionnalites des materiels FMS, on distingue en outre
le client FMS
Le client FMS emet une requete de service ; ceci presuppose que cette station est
une station maitre sur PROFIBUS.

SIMATIC NCM S7 pour Industrial Ethernet Prise en main

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Adapter la configuration dans la table de configuration
Si la configuration materielle ne correspond pas au modele de leexemple, vous pouvez maintenant
adapter les entrees et notamment, pour ne citer que quelques?Cunes des possibilit??s
embrocher un module un autre emplacement ;
C la configuration des liaisons reste inchangee ;
C les programmes utilisateur doivent ??tre adapt??s ?? l????ventuel changement dadresse du module
travailler sans module de simulation ;
Supprimez pour ce faire le module de simulation mentionnel emplacement 4.
utiliser un autre type de CPU ;

SIMATIC CP S7 pour Industrial Ethernet Manuel Partie A

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− Transport ISO
optimis pour la mise en oeuvre performante sur un niveau de fabrication ferme− services IP pour la communication inter−reseau avec
liaisons ISO−on−TCP (RFC 1006), liaisons TCP et
service de datagrammes UDP (y compris broadcast / multicast).
Communication compatible S5 avec services FETCH/WRITE (serveur)

11/10/2010

http://www.cadfamily.com/downinfo/302167.html

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The Configure panel context will change context with the selected project branch

• In the Configure Component : Stock , Add Model > Cylinder
• Height (Z) = 260
• Radius = 70 [Enter]
A model was added to the Tree under the Stock component

This axis displays the "driven point" (identified by the symbol) and the X, Y, Z
DrivenPoint axes. The Driven Point Zero axis represents where the driven point of the
"active" tool would be located, relative to the "active" stock, if all linear axes were
positioned at zero.
The origin of the NC program (Program Zero) is located on the bottom center of the stock.

Measure Features with X-Caliper

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In VERICUT, the part can be measured just like in the inspection department. Wall
thickness, drilled hole diameter, position and angle of a feature can all be measured. In
this session you will inspect a part.
1. Open template project file
template_DMG_DMU50_x_caliper.VcProject
1. Launch VERICUT
2. File > Open
3. Shortcut = Training
4. File = template_DMG_DMU50_x_caliper.VcProject
5. Open
We will setup this project using the Project Tree. Undefined items in the tree are
showing in a magenta color.

Compare Cut Part to Design with AUTODIFF

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In VERICUT, the cut part can be compared to the Design model to detect gouges or
excess material.
1. Open template project file template_autodiff.VcProject
1. Launch VERICUT
2. File > Open
3. Shortcut = Training
4. File = template_autodiff.VcProject
5. Open
We will setup this project using the Project Tree. Undefined items in the tree are
showing in a magenta color.
2. Load a STL file model for the initial stock
• In the Project tree, select Stock (0, 0, 0)
• In the Configure Component : Stock , Add Model > Model File
• Shortcut = Training
• File name = auto-diff_stock.stl
• Open

Transitioning From VERICUT Pre-V6.0 to VERICUT V6.X

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The Project Tree shows all Setups and each Setup's configuration in a tree hierarchy. A
project can consist of one, or more, setups. VERICUT processes each "active" setup
sequentially, starting at the top of the tree. The functionality available in the Project Tree
duplicates the functionality available in the Project menu, but in a more visual tree
format.
The following examples describe some of the information available to you from the way
that the items in the Project Tree are displayed.

Vericut online help cover

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Vericut online help cover-picture in it

AVR IAR Assembler Reference Guide

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Conditional directives
Use the #if...#else...#endif directives to control the assembly process at assembly
time. If the condition following the #if directive is not true, the subsequent instructions
will not generate any code (i.e. it will not be assembled or syntax checked) until a
#endif or #else directive is found.
All assembler directives (except for END) and file inclusion may be disabled by the
conditional directives. Each #if directive must be terminated by a #endif directive.
The #else directive is optional and, if used, it must be inside a #if...#endif block.
#if...#endif and #if...#else...#endif blocks may be nested to any level.
Use #ifdef to assemble instructions up to the next #else or #endif directive only if
a symbol is defined.
Use #ifndef to assemble instructions up to the next #else or #endif directive only if
a symbol is undefined.

Installation and Licensing Guide for IAR Embedded Workbench

http://www.cadfamily.com/downinfo/302182.html

Each IAR Embedded Workbench product comes with a software license. There are
two types of IAR Systems license keys associated with a license:
񠔨e QuickStart key, which allows you to use the product for 30 days after
installation
񠔨e permanent key, which opens up the product for permanent usage.
You install IAR Embedded Workbench using the QuickStart key. This allows you to
start using the product immediately after installation and 30 days onward. The
QuickStart key is included in the welcome letter of your product package.
During the 30-day period, you must activate your license by registering the product with
IAR Systems. After registration, you will obtain the permanent key from IAR Systems.
By installing the permanent key, the product is opened up for permanent usage.
Registering the product also entitles you to one year of free upgrades and prioritized
technical support, depending on your purchased product.
As it can take up to 5 business days until you receive the permanent key, you should
register the product as soon as possible after installation.
Note: If you do not activate and register your product, you will be unable to run it after
the 30-day period.

IAR Embedded Workbench MISRA Reference Guide

http://www.cadfamily.com/downinfo/302183.html

Manual checking
There are several rules that require manual checking. These are, for example, rules
requiring knowledge of your intentions as a programmer or rules that are impractical to
check statically, requiring excessive computations.
Note: The fact that rule 3.6 is not enforced means that standard header files in a project
are not checked for compliance.
Documenting deviations
A deviation from a MISRA C rule is an instance where your application does not follow
the rule. If you document a deviation from a rule, you can disable the warning for
violations of that particular rule.
Note: Your source code can deviate from a rule as long as the reason is clearly
documented. Because breaking rules in a controlled fashion is permitted according to
the MISRA C guidelines, error messages can be explicitly disabled using the
#pragma diag_xxx directives.

IAR PowerPac TCP/IP Stack User Guide

http://www.cadfamily.com/downinfo/302184.html

MII / RMII: Interface between MAC and PHY
The MAC communicates with the PHY via the Media Independent Interface (MII) or the Reduced Media Independent Interface (RMII). The MII is defined in IEEE 802.3u. The RMII is a subset of the MII and is defined in the RMI specification. The MII/RMII interfaces can handle control over the PHY which makes it possible to configure select transmission criteria as line speed, duplex mode, etc.
In theory, up to 32 PHYs can be connected to a single MAC. In praxis, this is never done; only one PHY is connected.
To allow multiple PHYs to be connected to a single MAC, individual 5-bit addresses have been be assigned to the different PHYs. If only one PHY is connected, the IAR PowerPac TCP/IP driver automatically finds the address of it.
The standard defines 32 16-bit PHY registers. The first 6 are defined by the standard.

IAR PowerPac USB Host User Guide

http://www.cadfamily.com/downinfo/302187.html
This chapter provides a step-by-step introduction to using IAR PowerPac USB Host.
Starting with an example project PowerPac includes an example workspace and projects for every supported CPU. We recommend to use these as a starting point for all your applications.
To get your new application running, you should proceed as follows:
1 Create a work directory for your application, for example c:\work
2 In the IAR Embedded Workbench IDE, select Example applications in the Startup dialog box.
3 If the Startup dialog box is closed, choose Help | Startup Screen to open it.
4 Select BoardSupport from the Example Applications list.
5 Select the project which is consistent to your hardware. Choose a destination folder for your project, for example c:\work. After generating the project of your choice, the screen should look for example like this:

JTAGjet-ARM Driver for IAR Embedded Workbench Installation Instructions

http://www.cadfamily.com/downinfo/302188.html

With the ARM RDI 1.5.1 Driver for Signum Emulators installed, you are ready to
configure your Embedded Workbench
IAR Embedded Workbench IAR Embedded Workbench IAR Embedded Workbench IAR Embedded Workbench
To configure the IAR Embedded Workbench:
1. Choose Options from the Project menu. The Options for Target dialog box
appears. Select the C-SPY category. In the Setup tab, choose RDI as the driver, as
in Figure 4.
2. Select the RDI tab. In the Manufacturer RDI Driver edit box, navigate to the
SigJdsRDI.dll file in the C:\Signum\RDI151 directory, as in Figure 5.

11/08/2010

8051 IAR C/C++ Compiler Reference Guide

http://www.cadfamily.com/downinfo/302079.html

The difference between the alternative __xdata and __far memory allocation
functions and the standard functions is the pointer type of the return value and the
pointer type of the arguments. The functions malloc, calloc, and realloc return a
pointer to the allocated memory area and the free and realloc functions take a pointer
argument to a previously allocated area. These pointers must be a pointer of the same
type as the memory that the heap is located in, independent of the default memory and
pointer attributes.
Note: The corresponding functionality is also available in the DLIB runtime
environment.

IAR Embedded Workbench IDE User Guide

http://www.cadfamily.com/downinfo/302080.html

Terminal I/O Log File dialog box
The Terminal I/O Log Files dialog box??available by choosing
Debug>Logging allows you to select a destination log file, and to log terminal I/O
input and output from C-SPY to this file.
Figure 171: Terminal I/O Log File dialog box
Click the browse button to open a standard Save As dialog box. Click Save to select the
specified file??the default filename extension is log.

IAR C/C++ Development Guide Compiling and linking

http://www.cadfamily.com/downinfo/302081.html

The compiler performs many transformations on your application to generate the best
possible code. Examples of such transformations are storing values in registers instead
of memory, removing superfluous code, reordering computations in a more efficient
order, and replacing arithmetic operations by cheaper operations.
The linker should also be considered an integral part of the compilation system, because
some optimizations are performed by the linker. For instance, all unused functions and
variables are removed and not included in the final output.
SCOPE FOR PERFORMED OPTIMIZATIONS
You can decide whether optimizations should be performed on your whole application
or on individual files. By default, the same types of optimizations are used for an entire
project, but you should consider using different optimization settings for individual files.
For example, put code that must execute very quickly into a separate file and compile it
for minimal execution time, and the rest of the code for minimal code size. This will give
a small program, which is still fast enough where it matters.
You can also exclude individual functions from the performed optimizations. The
#pragma optimize directive allows you to either lower the optimization level, or
specify another type of optimization to be performed. Refer to optimize, page 252, for
information about the pragma directive.

IAR Embedded Workbench Known Problems

http://www.cadfamily.com/downinfo/302086.html

EW17516
The Embedded Workbench IDE freezes or crashes when executing a Make command if the filename extension of any output file also
is a valid extension for an input file to the assembler or compiler.
EW17445
When a workspace is created on a computer with a source code control system installed, the SCC information is stored in XML
format in the .eww file. This causes problems if the workspace is moved to a computer does not use SCC.
The only way to remove the information is to edit the text of the .eww file.
EW17098
If the Auto indent feature is enabled, a ':' in a comment is interpreted as a label and indented accordingly.

Vericut Cutter Grinder Help

http://www.cadfamily.com/downinfo/302070.html

The Cutter Grinder product consists of a subset of the functionality that is available in
standard VERICUT. The Cutter Grinder Help provides information specific to the
features that are available in Cutter Grinder. Most topics have a references to the standard
VERICUT Help which will provide additional information about the feature.
Once inside the VERICUT Help, the top level topics that pertain to both Cutter Grinder
and standard VERICUT will show you how to locate the feature in both products. As you
get into lower level topics, especially the references to Using VERICUT sections, the
discussions are directed toward the standard VERICUT interface. The concepts will
apply to Cutter Grinder, but how you access the feature will be different.

VERICUT Development Tools

http://www.cadfamily.com/downinfo/302071.html

void opapi_set_tool_change_setup_function(OPAPI_ToolSetupFunction
func_p)
Register user's tool change setup function with VERICUT. The tool change function
registered, func_p, should have the following declaration style:
typedef int (*OPAPI_ToolSetupFunction)(void *userData);
which returns 1 if tool setup is successful or 0 if tool setup failed. If failed, no
optimization will occur for the current tool. Therefore, if a tool does not need to be
optimized, just return 0 when func_p is called for this tool. This function should only be
called in opapi_setup() function. Once registered, the tool setup function, func_p, will be
called each time a tool change occurs.

Getting Started with VERICUT

http://www.cadfamily.com/downinfo/302072.html
In addition to streamlining the verification process, VERICUT dramatically boosts
productivity on the shop floor. Automated and user-selectable optimization settings in
VERICUT let you maximize the material removal process. The feed rate and cutting
speed of each NC program automatically adjust based on the depth, width, and angle of
each cut. In fact, you can even set VERICUT to compensate for dull or custom cutters or
other elements unique to your operation.
VERICUT simulates up to 5-axis milling, drilling and wire EDM operations, as well as
turning and combination mill/turn machining. With a complete line of specialization
modules for added features and functionality, VERICUT is truly the total simulation,
verification, and optimization solution for unleashing NC productivity.

Installing CGTech Products

http://www.cadfamily.com/downinfo/302073.html

There are several different ways to configure your VERICUT installation. Following are
three common configurations: a simple single computer or stand-alone installation and
two different multiple-computer installations.

Single Computer Installation


• VERICUT is installed on this computer's local disk.
• The license server program is running on this computer.
• The license server program only supplies licenses to VERICUT running on
this computer.

VERICUT HELP-Analysis menu

http://www.cadfamily.com/downinfo/302074.html

VERICUT HELP-Analysis menu

VERICUT HELP-Analysis menu

The X-Caliper option opens The X-Caliper window enabling you to take measurements,
and obtain historical and mathematical information about VERICUT models. The
appearance of the window will vary depending on the X-Caliper feature being used. X-
Caliper shows what is being measured on the model area by highlighting the "measure
from" point (+) and the "measure to" point (o). Results from X-Caliper operations are
displayed in the X-Caliper window. Measurements are described relative to the active
coordinate system.
The X-Caliper window is also one of the dockable windows enabling you to dock it
inside the VERICUT main window if you choose. See Dockable Windows in the Getting
Started with VERICUT section of VERICUT Help for additional information.
http://www.cadfamily.com/downinfo/302074.html

http://www.cadfamily.com/downinfo/302093.html

SIMATIC NET S7−CPs fur PROFIBUS Projektieren

Datenvolumen und Mengengerust
Der PROFIBUS−CP unterstutzt jeweils eine Broadcast−Verbindung.
Pro Auftragspuffer können bis zu 236 Byte Nutzdaten ??bertragen werden. Der
Auftragsheader belegt zusätzlich 4 Byte.
Achtung
Wenn Sie eine FDL−Verbindung mit Broadcast nutzen, können Sie auf dem betref-
fenden CP auf keiner weiteren Broadcast−Verbindung Nachrichten empfangen,
auch auf keiner FMS−Verbindung mit Broadcast.
Begrundung:
Der Empfangs−LSAP fur Broadcast (63) ist mit einer Broadcast−Verbindung
belegt.

SIMATIC Ablaufsteuerungen programmieren

http://www.cadfamily.com/downinfo/302097.html

Aufgabenstellung
Fur die Automatisierung einer Bohrmaschine soll eine Ablaufsteuerung
programmiert werden. Vorgegeben ist der Aufbau der Bohrmaschine anhand eines
Technologiebilds und der Ablauf in Form eines Funktionsdiagramms.
Technologiebild - Aufbau der Bohrmaschine
Die Bohrmaschine besteht aus folgenden Elementen:
• Bohrmotor mit R??ckmeldungen fur Bohrer läuft/steht
• Starttaster und Vorwahlschalter K??hlmittel
• K??hlmittelpumpe mit Ruckmeldung fur Kuhlmitteldruck erreicht
• Spanneinrichtung mit Ruckmeldung fur Sollspanndruck erreicht
• Vorschub Bohrer heben/senken mit Endschalter fur Bohrer oben/unten

SIMATIC Erste Schritte Getting Started

http://www.cadfamily.com/downinfo/302099.html

An der Ausgabebaugruppe kann immer nur ein Wert angezeigt werden. Deshalb
soll es folgende Auswahlmöglichkeiten geben:
• Auswahl eines Elements innerhalb einer Liste
• Auswahl zwischen Messwert, Wurzel und Quadrat
Die Auswahl des angezeigten Wertes wird wie folgt realisiert:
• Mit drei Schaltern wird eine Codierung eingestellt, die ??bernommen wird, wenn
an einem vierten Schalter, dem Codierschalter, eine Flanke erkannt wird.
Daraus wird die Adresse berechnet, mit der die Ausgabe adressiert wird.
• Mit der gleichen Adresse werden drei Werte, Messwert, Wurzel und Quadrat,
f??r die Ausgabe bereitgestellt. Um daraus einen Wert auszuwählen, sind zwei
Umschalter vorzusehen.

FEMLAB Electromagnetics Modeling Course

http://www.cadfamily.com/downinfo/302101.html

Low frequency application modes in FEMLAB
Electrostatics
3D
In-plane
Axisymmetric
Quasi-static
3D Magnetic
3D Electromagnetic
In-plane (two cases dependent on current direction)
Axisymmetric (two cases dependent on current direction)


Computed quantities for radio and frequency modeling
S-parameters (transmitted and reflected energy)
Optimal shape
Far-field appearance (antennas)
Phase distortions
Heat generated
Allowed modes (Propagating modes) and propagation constants

FEMLAB Microwave Frequency Modeling

http://www.cadfamily.com/downinfo/302103.html

Low Frequency
Electrical Machinery, Magnets, Capacitors, Inductors
Radio Frequency
Radio Components, Antennas, Transmission Lines, Microwave Waveguides
Photonics
Photonic Waveguides, Photonic Crystals, Semiconductor Lasers

Computed quantities for radio and frequency modeling
S-parameters (transmitted and reflected energy)
Optimal shape
Far-field appearance (antennas)
Phase distortions
Heat generated
Allowed modes (Propagating modes) and propagation constants

Introduction to FEMLAB

http://www.cadfamily.com/downinfo/302104.html

Description of our world results in equations
Change in space and time results in PDE
Complex geometries and phenomena require modeling with equations and boundary conditions
Very few PDEs have analytical solutions
Numerical tools

User-friendliness to allow you to concentrate on the problem and not on the software

Flexibility to maximize the family of problems that you can formulate in FEMLAB

Openness to allow you, as an advanced user, to implement your own code in FEMLAB and to change the built-in code

FEMLAB PDE intro

http://www.cadfamily.com/downinfo/302106.html
Devices Modeled

Waveguides and optical fibers
Mainly cross-sectional (perpendicular) mode analysis (2D)
Some 3D and in-plane modeling
Other materials than for microwave waveguide
Photonic waveguides: glas and plastics
Microwave waveguides: metals

The same application modes are used as for radio and microwave design

The Chemical Engineering Module

http://www.cadfamily.com/downinfo/302107.html

Introduction
What is the Chemical Engineering Module
Short intro example
Momentum balance
Fluid flow
Mass balance
Fluid flow coupled to convection and diffusion
Free and porous media flow
Modeling of processes in different dimensions
Transport in 2D and adsorption in 1D
General Remarks

SIMATIC NET Industrial Ethernet

http://www.cadfamily.com/downinfo/302088.html

Technische Neuerungen
Neben diversen Anpassungen an die aktuell lieferbaren Geräte und die aktuelle
Version von STEP 7 / NCM S7 V5.4 SP4 wurden ber??cksichtigt:
Parameteränderung bei den Bausteinen f??r PROFINET IO (siehe /9/):
− FC11 PNIO_SEND (Bausteinversion 2.0)
− FC12 PNIO_RECV (Bausteinversion 2.0)
Die beiden Funktionen m??ssen Sie in der Version V2.0 einsetzen, wenn der CP
gleichzeitig im PROFINET IO−Controller− und Device−Betrieb arbeiten soll.
Neuer Funktionsbaustein FB40 f??r den FTP−Client−Betrieb von Advanced−CPs
(in /9/)
Erweiterung des SMTP−Protokolls auf ESMTP zur Authentifizierung eines
Advanced−CP als E−Mail−Client beim Mail−Server (Funktion: Kapitel 9; Diagno-
semeldungen: Kapitel 13.7)

11/02/2010

PEPS TubeCut Module Lasercutting 6 axis

http://www.cadfamily.com/downinfo/301950.html

TubeCut Module Lasercutting 6 axis Training Manual for PEPS Version 5.3

PEPS Cutting Technology Definitions

http://www.cadfamily.com/downinfo/301939.html

Pick from the Utilities Menu the Technology Definitions Option.
The Cutting Technology Selection Dialogue is displayed.
There is no Cutting Technology available specifically for 5mm thick Steel.
We could create it using New and entering all of the necessary Technology information.
However it is much easier to make a Copy of an existing one and modify it to suit.

PEPS Using Special End Cut Shapes

http://www.cadfamily.com/downinfo/301946.html

In this Exercise we will make a join using a Q Angle of 45-degrees as shown in the bitmap
image. This joint will be created in such a way that it creates a 90-degree Corner, but this does not have to be the case, it can be used as an end to end joint as in Example 5.

PEPS Nesting Parts and Trimming End of Tube

http://www.cadfamily.com/downinfo/301947.html
In Example 4, four Parts were to be produced using a shared cut between Components and the
end of the Raw Material was deemed good enough not to need trimming.
If it was necessary to trim the end of the Tube this could be achieved by adding a Cut to the other end of the Component.
This would however mean that we would have duplicate cutting in three places.
So trimming the End off the Tube cannot practically be achieved by modifying the methods used in Example 4.
To achieve what is required, we will have to create a Dummy Component to which we can apply the Trimming Cut and then use the Component Nesting Option.

PEPS Nesting Parts Without a Common Cut

http://www.cadfamily.com/downinfo/301948.html

In Example 7, all parts had square ends so that they could be nested with no gap i.e. one cut cuts two sides.In this example we will nest more parts but there will be a gap between them and therefore no need for a dummy part.

Before we proceed with the nesting we will explain a little trick to save material.Example 6 had 45-degree mitres and if nested end to end would create lots of waste material.It would be nice if one of the parts could be rotated by 180 degrees to save material.

ANSYS-Coarsening on a cast FEA

http://www.cadfamily.com/downinfo/301957.html

After importing the data, there will be only one surface.
Use build topology to segment the surfaces and add curves

Build Topology Creates curves and segments the surface by angle.
Use Surface => Change Family to make the surfaces more manageable.

ANSYS Automobile Suspension Bracket Analysis

http://www.cadfamily.com/downinfo/301953.html

This exercise will analyze an automobile suspension bracket. The bracket is
mounted to the automobile frame in the center hole, and to the wheel linkage
on the front and rear holes.The objective of the analysis is to evaluate
stresses under a limit load condition.The bracket is expected to yield,
therefore a plastic analysis will be necessary.The Parasolid model will be
imported into ANSYS and shell meshed, and analyzed elastically entirely
within the MTB the first time through.We will then transition to ANSYS
Mechanical to perform a plastic analysis.

ANSYS Rocket Engine Turbopump Flowguide Analysis

http://www.cadfamily.com/downinfo/301954.html

In this exercise, we will perform a thermal transient/static structural analysis of
a rocket engine turbo pump flow guide. The flow guide redirects combustion
gases through the pump during operation. Before launch, the flow guide is
cooled to cryogenic temperatures as liquid oxygen is pumped through it.
During launch, the superheated combustion gases heat the flow guide from
cryogenic temperatures (-350F) to over 1400F in approximately 10-seconds.
Although there are negligible mechanical stresses on the part, thermal
gradients are very severe.
The rocket engine is part of a reusable vehicle, which is designed to last for 50
missions. Post flight inspections reveal that the flow guide develops thermo
mechanical fatigue (TMF) cracks in the guide vanes after only one flight.
The goal of the analysis is to determine the time point after launch that has the
highest thermal gradient through the wall of the flow guide, and perform a
stress analysis at this limiting point.

ANSYS Fighter Jet Vectoring Nozzle

http://www.cadfamily.com/downinfo/301955.html

In this exercise, we will perform a structural analysis of a vectoring nozzle used on
a high performance jet fighter engine.Today??s state-of-the-art fighter aircraft are
using vectoring nozzle technology to gain a performance edge over the
competition.Airplanes are propelled forward by the expulsion of exhaust from the
engine.Thrust vectoring is a method of changing the exhaust in a way that would
cause the aircraft to change direction in a more abrupt manner than can be done
with traditional control surfaces such as flaps (ailerons, elevators,and rudders).

The nozzle design in this exercise (figure below) is similar in concept to one used
in a current jet fighter engine in service today.It consists of a series of flaps
hinged to a ring (A) at the forward section, and connected to a secondary outer
ring (B)through a set of struts (C).Moving the outer ring forward or backwards
controls the throat area of the nozzle.Vectoring is accomplished by tilting the
outer ring,or moving it up/down/left/right relative to the engine axis.These
movements are controlled by a series of actuator arms connected to the outer ring
(not shown).

ANSYS Roots type Supercharger

http://www.cadfamily.com/downinfo/301956.html

The Roots type supercharger shown below is used to boost the intake pressure
of an internal combustion engine by approximately 12-15 PSI, drastically
improving the performance of the engine.The device consists of two rotor
assemblies turning in opposite directions.The air is pushed around the outside
of the rotors and out the bottom. Air can??t leak back up through the rotors due
to the close clearances between the rotors and the case.The outer surface of
each rotor lobe contains a Teflon seal strip to prevent leakage.In order to
reduce pulsing of the pressure, the lobes are often twisted along the rotational
axis, or helically, as shown below.